The YGREC8's Manual : the OR opcode

Created dim. 29 oct. 2023 23:40:23 CET by whygee@f-cpu.org

PRELIMINARY / WORK IN PROGRESS

Encoding

Description

This opcode takes the SRI operand and computes a boolean OR with the SND operand, then writes the result back into SND. This is also the favoured method to implement the NOP opcode alias, when all the bits are cleared: 0000h is a chosen special case of OR D1 D1 NEVR which never completes its function.

If the destination register (SND unless instructed otherwise by PF) is PC, this performs a jump. But it's pretty dumb.

Effects

OR affects the Sign and Zero flags but not the Carry.

Forms

This is a core operation that supports all 3 types of operand for SRI:

• Imm8: an immediate field of 8 bits is taken directly from the instruction.
• Imm4: a sign-extended immediate value. Can be inhibited by a one of 8 conditions.
• SRI: one of the 8 registers. Can be inhibited by a one of 16 conditions.

Examples

OR R1 R2 ; R2 = R2 | R1

OR 123 R3 ; R3 = R3 | 123

; OR R2 into R1 if external bit 2 is set
OR R2 R1 IF2 

; set bit 1 of R3 if the last result was not zero.
OR 2 R3 IFNZ

; Alias:
OR D1 D1 NEVR ; must assemble to 0000h

NOP ; must also assemble to 0000h