Created dim. 29 oct. 2023 23:40:23 CET by whygee@f-cpu.org PRELIMINARY / WORK IN PROGRESS
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 1 | 1 | × | × | × | × | × | × | × | × | × | × | × | × |
This opcode is INValid. It traps the core, which might freeze or restart (depending on the implementation).
Its value matches the bit pattern of uninitialised Flash memory cells.
The 12 LSB are not decoded and might be used for future ISA expansions. Don't mess with them, 1111xxxxxxxxxxxx should always be disassembled and reassembled to 1111111111111111.
INV does not affect the Carry, Sign or Zero flags.
It might affect a Reason I/O register and/or the overlay number if they are implemented.
This instruction has no argument.
INV ; something went wrong here.